1. Field of the Invention
The present invention relates to a semiconductor device having an A/D conversion circuit, and more particularly to a semiconductor device that outputs conversion results of the A/D conversion circuit externally to enable testing of the A/D conversion circuit.
2. Description of the Prior Art
In recent years, semiconductor devices called system-on-chips, in which an A/D conversion circuit, a digital circuit for performing processing based on the conversion results and the like are mounted on one chip, have increasingly become mainstream. In some of such semiconductor devices having an A/D conversion circuit, a mode switch circuit is embedded so that A/D conversion results can be directly outputted externally via a digital buffer, to thereby allow separate testing of the A/D conversion circuit.
During the testing, however, a variation in power supply voltage and noise may occur because the digital buffer drives a comparatively large load testing apparatus (LSI tester). If influences of such a variation and noise become great, the A/D conversion precision may be degraded even though high-precision A/D conversion can be performed in actual use of the semiconductor devices, and thus proper testing may not be obtained.
To deal with the above problem, a technology is proposed in which a digital signal outputted from an A/D conversion circuit is converted to an analog signal of which level is slowly changed and the resultant signal is outputted via an analog buffer, thereby reducing the influences of a variation in power supply voltage and noise to improve the testing precision (see Japanese Laid-Open Patent Publication No. 2002-246909, for example)
However, the conventional semiconductor device described above has the following problems. Even though a digital signal is converted to an analog signal of which level is slowly changed, the influences of a variation in power supply voltage and noise will not necessarily be eliminated as long as a level shift occurs, depending on the relationship thereof with the magnitude of the load of the testing apparatus and the like. Moreover, the use of an analog buffer will cause an increase in circuit scale.